1. Field of the Invention
This invention generally relates to a rate multiplier, and more particularly to a rate multiplication method and rate multiplier thereof an adjustable multiplying rate.
2. Description of Related Art
In electronic circuit application, a signal frequency f is usually multiplied by a rate n/m, being smaller than 1, in order to obtain a smaller frequency signal. This operation is referred to as rate multiplication. For example, multiply a pulse signal of 10 MHz frequency by 3/10, a 3 MHz-frequency pulse signal is obtained. Visually, retaining three out of the ten of the pulse signals implements rate multiplication therein.
In some conventional method, n pulse signals are selected arbitrarily out of m pulse signals by hardware circuitry; in some other conventional method, n pulse signals with equal space or unequal space are selected via hardware circuitry out of m pulse signals. Relative detail can be referred to U.S. Pat. No. 4,541,408 and U.S. patent 2003/0058052.
However, the hardware circuitry in foregoing method is designed backwards from final waveforms, which causes substantial burden to circuit designers. In addition, the n pulse signals are assigned either equally spaced or unequally spaced, where pulse interval is not adjustable upon requirement, so that usage flexibility is relatively lower.